This invention relates to a semiconductor device and a process for its fabrication.
In recent years, as a trend of semiconductors, their packaging in a higher density is being advanced. With this trend, the mainstream of semiconductor device packaging has shifted from through-hole mount packaging to surface-mount packaging. Also, the number of input/output terminals of a package is being made larger with an improvement in the degree of integration of semiconductors.
Hitherto, as typical surface-mount type semiconductor devices, QFP (quad flat package), for example, has been used which is a structure in which semiconductor elements are mounted on a metallic lead frame, the whole of the semiconductor element is encapsulated after gold wire bonding is carried out, and outer leads are cut and shaped and are put out from the sides of an encapsulated portion. However, in order to make this structure have terminals in a larger number, the terminal pitch must be made smaller. In a region with a pitch of 0.5 mm or smaller, a high-level technique is required for their connection to a mother board on which semiconductor elements are to be mounted. Accordingly, OMPAC (over-molded pad grid carrier) type BGA (ball grid array) where outer-face devices are arranged in array has been developed, and is being put into practical use.
This BGA enables arrangement of external terminals in a large number per unit area, and allows easy face-bonding mount onto the mother board, also enabling miniaturization with ease in comparison with the above-mentioned QFP.
An example of this OMPAC type BGA (hereinafter simply xe2x80x9cBGAxe2x80x9d) is shown in FIG. 2. First, a semiconductor element 1 is fixed onto a semiconductor-element-mounting substrate 14 by means of an adhesive 3 or the like. Terminals on the semiconductor element 1 are electrically connected with gold-plated terminals 7 formed on the semiconductor-mounting substrate through gold wires 8. The semiconductor element 1 is further encapsulated with an organic insulating encapsulant 5. On an insulating base material 2, a metallic wiring pattern is incorporated which is electrically interconnected with a semiconductor element electrode. This metallic wiring pattern is constituted of fine wiring patterns 6 for transmitting electric signals. These are connected with external connecting terminals 9 through the insulating base material 2 on the back which is opposite to the side on which the semiconductor element is to be mounted. Also, in many cases, the fine wiring patterns 6 and the insulating base material 2 are covered with an insulating protective resist 4 at areas except for those of the region where the gold-plated terminals 7 are arranged for wire bonding and of the external terminals 9. Meanwhile, external terminals provided with solder balls in array are formed on the substrate. These are connected with external connecting terminals 9 through the insulating base material 2 on the back which is opposite to the side on which the semiconductor element is to be mounted. Also, in many cases, the fine wiring patterns 6 and the insulating base material 2 are covered with an insulating protective resist 4 at areas except for those of the region where the gold-plated terminals 7 are arranged for wire bonding and of the external terminals 9. Meanwhile, external terminals provided with solder balls in array are formed on the substrate.
In such a BGA device, members that occupy the greater part of the BGA""s whole volume, except for those of the semiconductor element 1, fine wiring patterns 6, gold wires 8, gold-plated terminals 7 and solder balls 10, are organic materials, and hence these members absorb moisture during the storage of the device. For this reason, for example, as shown in FIG. 2, the moisture absorption water content may vaporize at a gap 13 formed between the semiconductor element 1 and the adhesive 3 to cause cracking or separation 11 in the interior of the insulating protective resist 4 embraced in the semiconductor-mounting substrate, or at the interface between the insulating protective resist 4 and the organic insulating encapsulating member 5 (at the interface between the insulating base material and the organic insulating encapsulating member 5 when the insulating protective resist 4 is not provided). Then, where this cracking or separation 11 has extended to the gold-plated terminals 7 for wire bonding as shown in FIG. 2, it may cause faulty electrical interconnection in the worst case.
The present invention provides a semiconductor device which may less cause cracking when mounted by soldering and can improve electrical interconnection reliability.
The semiconductor device of the present invention comprises;
(A) a semiconductor-element-mounting substrate having an insulating base material on which a stated wiring pattern connected electrically with a semiconductor element electrode has been formed;
(B) a semiconductor element bonded to the semiconductor-element-mounting substrate via an adhesive and connected electrically with the wiring pattern; and
(C) an organic insulating encapsulant with which the semiconductor element is encapsulated at least at its electrode portion;
(D) the adhesive having an exothermic-reaction curing start temperature (Th) of 130xc2x0 C. or below as measured with a differential scanning calorimeter (DSC) at a heating rate of 10xc2x0 C./minute.
In the semiconductor device of the present invention, as the semiconductor-element-mounting substrate (A), used is a semiconductor-element-mounting substrate having an insulating base material on which a stated wiring pattern connected electrically with a semiconductor element electrode has been formed and having an external connecting terminal conducting to the wiring pattern, formed on the back which is opposite to the side on which the wiring pattern has been formed, and the organic insulating encapsulant (C) can be so applied as to encapsulate the whole of the semiconductor element (i.e., so applied that the semiconductor element surface is not uncovered).
The adhesive (D) may also preferably have a saturation moisture absorption of 0.18% by weight or less at 30xc2x0 C. and 85% RH.
The present invention also provides a process for fabricating a semiconductor device; the process comprising the steps of;
bonding via an adhesive a semiconductor element to the surface of a semiconductor-element-mounting substrate having an insulating base material on which a wiring pattern has been formed, to connect an electrode of the semiconductor element electrically with the wiring pattern; and
encapsulating with an organic insulating encapsulant the semiconductor element at least at its electrode portion;
the adhesive comprising an adhesive having an exothermic-reaction curing start temperature of 130xc2x0 C. or below as measured with a differential scanning calorimeter at a heating rate of 10xc2x0 C./minute.
The semiconductor device having the construction that the external terminals solder balls 10 are taken out from the surface of the semiconductor-mounting substrate as stated previously (FIG. 2) has an advantage that the multi-pin structure can be achieved with ease. However, it on the other hand has a problem that a warpage deformation tends to occur which starts from the center of the semiconductor device when it is cooled from molding temperature to room temperature or when the temperature is raised to reflow temperature, because of the fact that the semiconductor device has the construction of one-side encapsulation in shape and because of a great difference in values of physical properties between the semiconductor-element-mounting substrate and the organic insulating encapsulant 5.
Hence, a plurality of solder balls 10 having been so arranged as to be on the same plane on the semiconductor-mounting substrate come not to be arranged on the same plane as the semiconductor device undergoes a warpage deformation, to become different in height at some part. When this is tested in a packaging inspection step, a difficulty may arise in the connection of connectors to cause a trouble that no sufficient inspection can be made. Also, when such a semiconductor device is surface-mounted on a printed circuit board, some balls can not perfectly be connected to their corresponding wiring layers in the worst case, resulting in a low reliability at connection areas in some cases.
Accordingly, in the present invention, as the organic insulating encapsulant, it is preferable to use an encapsulant having a glass transition temperature between molding temperature and room temperature, having a difference of 0.6xc3x9710xe2x88x925/xc2x0 C. or above between the coefficient of linear expansion of the semiconductor-element-mounting substrate and the coefficient of linear expansion of the organic insulating encapsulant at a temperature not higher than the glass transition temperature, and having a curing shrinkage factor of 0.11% or less at the time of the molding of the organic insulating encapsulant.
Use of such an encapsulant can make cracking less occur when mounted by soldering and also can improve electrical interconnection reliability, preventing the semiconductor device from causing warpage deformation.
The organic insulating encapsulant may preferably have a saturation moisture absorption of 0.36% by weight or less at 85xc2x0 C. and 85% RH. The organic insulating encapsulant may also preferably have a modulus in flexure of 4.0 GPa or below at the molding temperature of the organic insulating encapsulant.